1. Field of the Invention
The present invention relates to a power conversion apparatus and a controller for the power conversion apparatus.
2. Description of the Related Art
FIG. 1 is a circuit diagram illustrating a power conversion apparatus according to a related art. This power conversion apparatus is a current-critical power factor correction circuit.
In the power conversion apparatus of FIG. 1, a rectifier RC1 rectifies an AC voltage from an AC power source Vin into a DC voltage. Both output ends of the rectifier RC1 are connected to a series circuit that includes a first winding N1 of a step-up transformer T1, a switching element Q1 made of a MOSFET, and a current sensing resistor R5. The output ends of the rectifier RC1 are also connected to a series circuit of resistors R1 and R2.
Both ends of a series circuit of the switching element Q1 and current sensing resistor R5 are connected to a rectifying-smoothing circuit including a rectifier D1 and a smoothing capacitor C1. Both ends of the smoothing capacitor C1 are connected to a series circuit of resistors R3 and R4.
The resistors R1 and R2 work as an input voltage detector to divide an output voltage from the rectifier RC1 and provide an input voltage signal Vvin. The resistors R3 and R4 work as an output voltage detector to divide a voltage across the smoothing capacitor C1 and provide an output voltage signal Vfb.
A controller 10 includes a multiplier 11, an error amplifier 12, comparators CMP1 and CMP2, and an RS-flip-flop FF2. The error amplifier 12 amplifies an error between the output voltage signal Vfb and a reference voltage Vref and outputs an amplified error signal Vcmp. The multiplier 11 multiplies the input voltage signal Vvin by the amplified error signal Vcmp and outputs a multiplication result signal Vmul. The current sensing resistor R5 detects a current passing through the switching element Q1 and provides a current signal Vis.
The comparator CMP2 compares the current signal Vis with the multiplication result signal Vmul, and if Vis is equal to or larger than Vmul, outputs a high-level signal to a reset terminal R of the RS-flip-flop FF2. The comparator CMP1 compares a voltage generated by a second winding N2 of the step-up transformer T1 with a reference voltage Vr, and if the voltage of the second winding N2 is equal to or lower than Vr, outputs a high-level signal to a set terminal S of the RS-flip-flop FF2.
Namely, the result of comparison between the current signal Vis from the current sensing resistor R5 and the multiplication result signal Vmul from the multiplier 11 determines an ON time of the switching element Q1 and a change in the voltage polarity of the second winding N2 of the step-up transformer T1 determines an OFF time of the switching element Q1.
FIG. 2 illustrates operating waveforms at various parts of the power conversion apparatus of FIG. 1. In FIG. 2, Vmul is the multiplication result signal, Vis is the switching current of the switching element Q1 detected by the current sensing resistor R5, OUT is a drive signal for the switching element Q1, and zcd is a voltage polarity signal detected from the second winding N2 of the step-up transformer T1.
Other related arts are disclosed in, for example, Japanese Unexamined Patent Application Publications No. S62-58871 and No. S63-186555 and Japanese Patent No. 3570113.